Serial data streams are frequently utilized in communication between and within electronic systems. A serial data stream often includes both digitized data and a clock signal (the “transmit clock”), combined to form a single, easily transmitted stream of data bits. At the destination, the data is extracted from the data stream. However, the transmit clock is also extracted from the data stream, and is used to operate at least a portion of the destination system or device. The circuit that performs this clock and data recovery is called a “clock and data recovery circuit”, or a CDR circuit.
The clock recovery process includes determining both the frequency of the transmit clock, and the phase of the transmit clock relative to a reference clock signal. Most CDR circuits use analog techniques to perform the phase and frequency detection, and these analog techniques require that signals be integrated. Design and integration of this CDR circuitry can be a time-consuming process requiring much fine-tuning and extensive circuitry.
Therefore, it is desirable to find simpler circuits for performing clock and data recovery, preferably not involving analog circuitry.